jun 96 AN70rev1 1 copyright ? crystal semiconductor corporation 1996 (all rights reserved) crystal semiconductor corporation p.o. box 17847, austin, texas 78760 (512) 445 7222 fax: (512) 445 7581 http://www.crystal.com the cs5101a/cs5102a: minimizing start-up time after coming out of sleep AN70 the cs5101a/cs5102a a/d converters include a sleep function to help reduce power consumption. the sleep function is a useful method of reducing the average power consumption in a data acquisi- tion system if the converter need not be operated continuously. when power is first applied to the cs5101a/cs5102a, the device must be calibrat- ed. then if the sleep function is activated, the cal- ibration register is maintained. when the cs5101a/cs5102a comes out of sleep, how quickly the converter can perform its first con- version depends on several different factors. when in sleep, the gate (clkin-xout) used for the crystal oscillator is powered down. therefore, when coming out of sleep, the oscillator must take some time to start up. the typical start-up time for a 2 to 8 mhz crystal oscillator is several millisec- onds. the time it takes for the oscillator to start up can be eliminated if an external clock is used. fig- ure 1 illustrates a j-k flip-flop being used to control an external clock to the cs5102a. a second source of delay when coming out of sleep, is that the refbuf capacitor must be charged. while asleep the capacitor will discharge because the on-chip current source which normally keeps it charged is shut off. when coming out of sleep, the on-chip current source is powered up. it must then charge the refbuf capacitor to a value nearly equal to the vref voltage. the time it takes to charge the refbuf capacitor is about 3 milli- seconds in the cs5101a and about 50 milliseconds in the cs5102a. this time can be eliminated if the refbuf capacitor is kept precharged. this can be accomplished by keeping the external reference voltage powered up and connecting a 2 k w resistor between pins 20 and 21 (vref and refbuf). see figure 1. by using an external clock and precharging the refbuf capacitor, the start-up time after coming out of sleep can be minimized. before performing the first conversion the internal circuitry must be- come stable after which the converter must go through a tracking cycle. the tracking cycle time is a function of the clkin rate (see cs5101a/2a datasheet). the cs5102a is a low power version of the cs5101a. the cs5101a typically uses 320 mw of power when operating. the cs5102a typically uses only 44 mw when operating. the higher op- erating currents of the cs5101a enable its internal circuitry to start-up quickly when coming out of sleep. the internal subcircuits inside the cs5102a are biased with such low currents that it takes much longer for the internal circuitry to awake after com- ing out of sleep. a method of enhancing the start- up time of the internal circuitry of the cs5102a is to prevent the device from falling into too deep of sleep. this can be accomplished by repeatedly pulsing the sleep pin high for 1 m sec. every 1000 m sec. this keeps the circuits internal to the cs5102a partially biased and enables the start-up time when coming awake to be minimized.
2 AN70rev1 cs5101a/cs5102a figure 1 illustrates the cs5102a with each of the enhancements necessary to minimize start-up time and figure 2 indicates the timing signals for sleep , clkin, and hold . lt10/9 4.5 +12 2k vref agnd refbuf clkin sleep sleep hold hold outmod sckmod cs5102a vd+ dgnd 0.1 -va jq +5 2x clk clock control cl k figure 1. cs5102a start-up enhancements. note: only pertinent pins are shown for simplicity 1sec m 1sec m clock control sdl (ssc mode) sleep hold track time (10 sec typical) m data output is complete 1000 sec m figure 2. timing for shallow sleep function (timing segments not to scale).
jun 96 AN70rev1 1 copyright ? crystal semiconductor corporation 1996 (all rights reserved) crystal semiconductor corporation p.o. box 17847, austin, texas 78760 (512) 445 7222 fax: (512) 445 7581 http://www.crystal.com the cs5101a/cs5102a: minimizing start-up time after coming out of sleep AN70 the cs5101a/cs5102a a/d converters include a sleep function to help reduce power consumption. the sleep function is a useful method of reducing the average power consumption in a data acquisi- tion system if the converter need not be operated continuously. when power is first applied to the cs5101a/cs5102a, the device must be calibrat- ed. then if the sleep function is activated, the cal- ibration register is maintained. when the cs5101a/cs5102a comes out of sleep, how quickly the converter can perform its first con- version depends on several different factors. when in sleep, the gate (clkin-xout) used for the crystal oscillator is powered down. therefore, when coming out of sleep, the oscillator must take some time to start up. the typical start-up time for a 2 to 8 mhz crystal oscillator is several millisec- onds. the time it takes for the oscillator to start up can be eliminated if an external clock is used. fig- ure 1 illustrates a j-k flip-flop being used to control an external clock to the cs5102a. a second source of delay when coming out of sleep, is that the refbuf capacitor must be charged. while asleep the capacitor will discharge because the on-chip current source which normally keeps it charged is shut off. when coming out of sleep, the on-chip current source is powered up. it must then charge the refbuf capacitor to a value nearly equal to the vref voltage. the time it takes to charge the refbuf capacitor is about 3 milli- seconds in the cs5101a and about 50 milliseconds in the cs5102a. this time can be eliminated if the refbuf capacitor is kept precharged. this can be accomplished by keeping the external reference voltage powered up and connecting a 2 k w resistor between pins 20 and 21 (vref and refbuf). see figure 1. by using an external clock and precharging the refbuf capacitor, the start-up time after coming out of sleep can be minimized. before performing the first conversion the internal circuitry must be- come stable after which the converter must go through a tracking cycle. the tracking cycle time is a function of the clkin rate (see cs5101a/2a datasheet). the cs5102a is a low power version of the cs5101a. the cs5101a typically uses 320 mw of power when operating. the cs5102a typically uses only 44 mw when operating. the higher op- erating currents of the cs5101a enable its internal circuitry to start-up quickly when coming out of sleep. the internal subcircuits inside the cs5102a are biased with such low currents that it takes much longer for the internal circuitry to awake after com- ing out of sleep. a method of enhancing the start- up time of the internal circuitry of the cs5102a is to prevent the device from falling into too deep of sleep. this can be accomplished by repeatedly pulsing the sleep pin high for 1 m sec. every 1000 m sec. this keeps the circuits internal to the cs5102a partially biased and enables the start-up time when coming awake to be minimized.
2 AN70rev1 cs5101a/cs5102a figure 1 illustrates the cs5102a with each of the enhancements necessary to minimize start-up time and figure 2 indicates the timing signals for sleep , clkin, and hold . lt10/9 4.5 +12 2k vref agnd refbuf clkin sleep sleep hold hold outmod sckmod cs5102a vd+ dgnd 0.1 -va jq +5 2x clk clock control cl k figure 1. cs5102a start-up enhancements. note: only pertinent pins are shown for simplicity 1sec m 1sec m clock control sdl (ssc mode) sleep hold track time (10 sec typical) m data output is complete 1000 sec m figure 2. timing for shallow sleep function (timing segments not to scale).
jun 96 AN70rev1 1 copyright ? crystal semiconductor corporation 1996 (all rights reserved) crystal semiconductor corporation p.o. box 17847, austin, texas 78760 (512) 445 7222 fax: (512) 445 7581 http://www.crystal.com the cs5101a/cs5102a: minimizing start-up time after coming out of sleep AN70 the cs5101a/cs5102a a/d converters include a sleep function to help reduce power consumption. the sleep function is a useful method of reducing the average power consumption in a data acquisi- tion system if the converter need not be operated continuously. when power is first applied to the cs5101a/cs5102a, the device must be calibrat- ed. then if the sleep function is activated, the cal- ibration register is maintained. when the cs5101a/cs5102a comes out of sleep, how quickly the converter can perform its first con- version depends on several different factors. when in sleep, the gate (clkin-xout) used for the crystal oscillator is powered down. therefore, when coming out of sleep, the oscillator must take some time to start up. the typical start-up time for a 2 to 8 mhz crystal oscillator is several millisec- onds. the time it takes for the oscillator to start up can be eliminated if an external clock is used. fig- ure 1 illustrates a j-k flip-flop being used to control an external clock to the cs5102a. a second source of delay when coming out of sleep, is that the refbuf capacitor must be charged. while asleep the capacitor will discharge because the on-chip current source which normally keeps it charged is shut off. when coming out of sleep, the on-chip current source is powered up. it must then charge the refbuf capacitor to a value nearly equal to the vref voltage. the time it takes to charge the refbuf capacitor is about 3 milli- seconds in the cs5101a and about 50 milliseconds in the cs5102a. this time can be eliminated if the refbuf capacitor is kept precharged. this can be accomplished by keeping the external reference voltage powered up and connecting a 2 k w resistor between pins 20 and 21 (vref and refbuf). see figure 1. by using an external clock and precharging the refbuf capacitor, the start-up time after coming out of sleep can be minimized. before performing the first conversion the internal circuitry must be- come stable after which the converter must go through a tracking cycle. the tracking cycle time is a function of the clkin rate (see cs5101a/2a datasheet). the cs5102a is a low power version of the cs5101a. the cs5101a typically uses 320 mw of power when operating. the cs5102a typically uses only 44 mw when operating. the higher op- erating currents of the cs5101a enable its internal circuitry to start-up quickly when coming out of sleep. the internal subcircuits inside the cs5102a are biased with such low currents that it takes much longer for the internal circuitry to awake after com- ing out of sleep. a method of enhancing the start- up time of the internal circuitry of the cs5102a is to prevent the device from falling into too deep of sleep. this can be accomplished by repeatedly pulsing the sleep pin high for 1 m sec. every 1000 m sec. this keeps the circuits internal to the cs5102a partially biased and enables the start-up time when coming awake to be minimized.
2 AN70rev1 cs5101a/cs5102a figure 1 illustrates the cs5102a with each of the enhancements necessary to minimize start-up time and figure 2 indicates the timing signals for sleep , clkin, and hold . lt10/9 4.5 +12 2k vref agnd refbuf clkin sleep sleep hold hold outmod sckmod cs5102a vd+ dgnd 0.1 -va jq +5 2x clk clock control cl k figure 1. cs5102a start-up enhancements. note: only pertinent pins are shown for simplicity 1sec m 1sec m clock control sdl (ssc mode) sleep hold track time (10 sec typical) m data output is complete 1000 sec m figure 2. timing for shallow sleep function (timing segments not to scale).
jun 96 AN70rev1 1 copyright ? crystal semiconductor corporation 1996 (all rights reserved) crystal semiconductor corporation p.o. box 17847, austin, texas 78760 (512) 445 7222 fax: (512) 445 7581 http://www.crystal.com the cs5101a/cs5102a: minimizing start-up time after coming out of sleep AN70 the cs5101a/cs5102a a/d converters include a sleep function to help reduce power consumption. the sleep function is a useful method of reducing the average power consumption in a data acquisi- tion system if the converter need not be operated continuously. when power is first applied to the cs5101a/cs5102a, the device must be calibrat- ed. then if the sleep function is activated, the cal- ibration register is maintained. when the cs5101a/cs5102a comes out of sleep, how quickly the converter can perform its first con- version depends on several different factors. when in sleep, the gate (clkin-xout) used for the crystal oscillator is powered down. therefore, when coming out of sleep, the oscillator must take some time to start up. the typical start-up time for a 2 to 8 mhz crystal oscillator is several millisec- onds. the time it takes for the oscillator to start up can be eliminated if an external clock is used. fig- ure 1 illustrates a j-k flip-flop being used to control an external clock to the cs5102a. a second source of delay when coming out of sleep, is that the refbuf capacitor must be charged. while asleep the capacitor will discharge because the on-chip current source which normally keeps it charged is shut off. when coming out of sleep, the on-chip current source is powered up. it must then charge the refbuf capacitor to a value nearly equal to the vref voltage. the time it takes to charge the refbuf capacitor is about 3 milli- seconds in the cs5101a and about 50 milliseconds in the cs5102a. this time can be eliminated if the refbuf capacitor is kept precharged. this can be accomplished by keeping the external reference voltage powered up and connecting a 2 k w resistor between pins 20 and 21 (vref and refbuf). see figure 1. by using an external clock and precharging the refbuf capacitor, the start-up time after coming out of sleep can be minimized. before performing the first conversion the internal circuitry must be- come stable after which the converter must go through a tracking cycle. the tracking cycle time is a function of the clkin rate (see cs5101a/2a datasheet). the cs5102a is a low power version of the cs5101a. the cs5101a typically uses 320 mw of power when operating. the cs5102a typically uses only 44 mw when operating. the higher op- erating currents of the cs5101a enable its internal circuitry to start-up quickly when coming out of sleep. the internal subcircuits inside the cs5102a are biased with such low currents that it takes much longer for the internal circuitry to awake after com- ing out of sleep. a method of enhancing the start- up time of the internal circuitry of the cs5102a is to prevent the device from falling into too deep of sleep. this can be accomplished by repeatedly pulsing the sleep pin high for 1 m sec. every 1000 m sec. this keeps the circuits internal to the cs5102a partially biased and enables the start-up time when coming awake to be minimized.
2 AN70rev1 cs5101a/cs5102a figure 1 illustrates the cs5102a with each of the enhancements necessary to minimize start-up time and figure 2 indicates the timing signals for sleep , clkin, and hold . lt10/9 4.5 +12 2k vref agnd refbuf clkin sleep sleep hold hold outmod sckmod cs5102a vd+ dgnd 0.1 -va jq +5 2x clk clock control cl k figure 1. cs5102a start-up enhancements. note: only pertinent pins are shown for simplicity 1sec m 1sec m clock control sdl (ssc mode) sleep hold track time (10 sec typical) m data output is complete 1000 sec m figure 2. timing for shallow sleep function (timing segments not to scale).
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